1. Technical Field
The inventive concept relates to a semiconductor integrated circuit device and a method for manufacturing the same, and more particularly, to a resistive memory device and a method for manufacturing the same.
2. Related Art
Non-volatile memory devices retains data stored therein even when power shuts down and thus, the non-volatile memory devices have been widely applied to computers, mobile telecommunication systems, memory cards, and the like
Flash memory devices which are representative as non-volatile memory devices have been widely used. The flash memory devices mainly apply memory cells having a stacked gate structure. The flash memory devices have to improve film quality of a tunnel oxide and a coupling ratio of a cell to improve reliability and program efficiency of a flash memory cell.
Currently, new non-volatile memory devices, for example, phase-change memory devices have been suggested other than the flash memory devices. In the phase-change memory devices, a unit cell includes a switching device connected at an intersection between a word line and a bit line arranged to be crossed each other and a data storage element connected to the switching device in series. The data storage element includes a lower electrode electrically connected to the switching device, a phase-change material pattern on the lower electrode, and an upper electrode on the phase-change material pattern. In general, the lower electrode serves as a heater.
In the phase-change memory devices, when a write current flows through the switching device and the lower electrode, Joule heat is generated in an interface between the phase-change material pattern and the lower electrode. The Joule heat changes the phase-change material pattern into an amorphous state (a high-resistance state or a reset state) or a crystalline state (a low-resistance state or a set state).
The phase-change material pattern is generally patterned to overlap the bit line. Thus, thermal disturbance is caused between phase-change material patterns adjacent on the same bit line.
In particular, when a space between cells is narrower with high integration of semiconductor devices, the thermal disturbance is more serious.
For example, in FIG. 1, when a cell A is in a high-resistance state which is a reset state and data “1” which is a high-resistance state is written in a cell B adjacent to the cell A, Joule heat is generated in the interface between a lower electrode 10 of the cell B and a phase-change material layer 20 to melt the phase-change material layer. At this time, since a phase-change material layer of the adjacent cell A is connected to the phase-change material layer of the cell B, the heat is conducted to the cell A and a temperature of the conducted region is increased. Therefore, the crystallization is progressed in a “1” state of a high-resistance state and thus resistance is reduced. Accordingly, the cell A of “1” state losses an original data value to loss a role as a storage cell.
The thermal disturbance is a troublesome problem in the high integration phase-change memory devices and various methods such as a confined structure of a phase-change material pattern have been suggested. However, it is difficult to remove disturbance between memory cells arranged in the same bit line. In particular, when a memory cell operating in a reset state and a memory cell adjacent thereto, which are arranged on the same bit line, become in a set state, malfunction is caused by an effect of the disturbance.